An AI-driven approach for next-generation chip manufacturing

CSU researcher Arif Sheikh developed a method to improve the design and production of 3D chips

Computer support engineer installing processor. Microprocessor with clearly visible silicon core and cache chip. Installation of computer processor in the socket. — Microchips power everyday technologies—from phones to cars to medical devices. Newer 3D chip designs have the potential to boost speed, cut power use, and enables smaller, more powerful devices. But the manufacturing process is complex and leaves little room for error, resulting in high levels of defects. CSU researcher Arif Sheikh developed a system to detect defects, optimize manufacturing, and predict failures—dramatically improving yield and reliability.

Inside every phone or computer is a tiny chip that acts as the device’s brain, powering everything from apps and graphics to battery management. These chips are manufactured using traditional 2D chip manufacturing, which spreads the components side by side on a single layer. Industry and researchers are trying to develop 3D chips, which have the potential to enhance performance, reduce power consumption, and save space compared to traditional 2D chips. However, the manufacturing process is complex and leaves little room for error, resulting in high levels of defects.

While working towards his doctoral degree in systems engineering at CSU, Arif Sheikh developed a method to improve design and production of 3D chips by integrating machine learning technology to prevent defects and enhance reliability. Sheikh created this solution with the help of advisor Dr. Edwin Chong, professor of electrical and computer engineering.

The process of designing and manufacturing a 3D chip is highly complex. Each chip consists of multiple layers that must be aligned and bonded with microscopic precision; even a small error can cause an entire batch to fail. Traditional manufacturing control methods often struggle to manage this level of complexity. Sheikh’s solution employs a System of Systems (SoS) framework—a coordinated network of smaller, intelligent subsystems that work together, guided by machine learning.

In this approach, AI models oversee each stage of the process:

Early-stage assembly. During the die-attachment phase, AI models inspect the process to detect misaligned parts or soldering issues. These algorithms identify defects with more than 86% accuracy, reducing wasted materials and rework.

Layer connection. Next, during the creation of Through-Silicon Vias (TSVs)—tiny vertical tunnels that connect the chip’s stacked layers—convolutional neural networks (CNNs) automatically adjust parameters like depth, temperature, and deposition rate. This fine-tuned control has cut defect rates from 10% to less than 1%, greatly improving consistency and yield.

Final testing. In the last stage, another AI model predicts potential electrical failures with 97% accuracy, allowing engineers to fix problems before the chips leave the factory.

Together, these interconnected systems share data in a continuous feedback loop that continually enhances the manufacturing process.

By combining AI with a SoS framework, Sheikh’s innovation represents an advancement in intelligent manufacturing, laying the groundwork for faster, smaller, and more reliable chips that power the technology used every day.

Learn more about this technology at csustrata.org/technology-transfer/available-technology/using-ai-to-make-3d-chip-manufacturing-more-reliable.

This technology is designed to work in real-time manufacturing settings and can be scaled across different chip types. For licensing inquiries, contact CSU Strata Licensing Associate Aly Hoeher at aly.hoeher@colostate.edu.